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Microcontroller stm32f030f4p6, firmware does not work after successful upload to MK, where to dig?
I use Eclipse to write code. Created a project for stm32f0x (by default, flasher) corrected the header file
// Port numbers: 0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, ...
#define BLINK_PORT_NUMBER (1) // Порт B
#define BLINK_PIN_NUMBER (1) //пин 1 - 14 нога в TSSOP20 корпусе
#define BLINK_ACTIVE_LOW (0)
st-flash --reset write empty.bin 0x08000000
2016-02-25T16:18:59 INFO src/stlink-common.c: Loading device parameters....
2016-02-25T16:18:59 INFO src/stlink-common.c: Device connected is: F0 small device, id 0x10006444
2016-02-25T16:18:59 INFO src/stlink-common.c: SRAM size: 0x1000 bytes (4 KiB), Flash: 0x4000 bytes (16 KiB) in pages of 1024 bytes
2016-02-25T16:18:59 INFO src/stlink-common.c: Attempting to write 1600 (0x640) bytes to stm32 address: 134217728 (0x8000000)
Flash page at addr: 0x08000400 erased
2016-02-25T16:18:59 INFO src/stlink-common.c: Finished erasing 2 pages of 1024 (0x400) bytes
2016-02-25T16:18:59 INFO src/stlink-common.c: Starting Flash write for VL/F0/F3 core id
2016-02-25T16:18:59 INFO src/stlink-common.c: Successfully loaded flash loader in sram
1/1 pages written
2016-02-25T16:18:59 INFO src/stlink-common.c: Starting verification of write complete
2016-02-25T16:18:59 INFO src/stlink-common.c: Flash written and verified! jolly good!
st-flash erase
2016-02-25T16:29:33 INFO src/stlink-common.c: Loading device parameters....
2016-02-25T16:29:33 INFO src/stlink-common.c: Device connected is: F0 small device, id 0x10006444
2016-02-25T16:29:33 INFO src/stlink-common.c: SRAM size: 0x1000 bytes (4 KiB), Flash: 0x4000 bytes (16 KiB) in pages of 1024 bytes
Mass erasing
openocd -f interface/stlink-v2.cfg -f target/stm32f0x.cfg
Open On-Chip Debugger 0.9.0 (2015-09-02-10:42)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v17 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.214650
Info : stm32f0x.cpu: hardware has 4 breakpoints, 2 watchpoints
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> reg
===== arm v7m registers
(0) r0 (/32)
(1) r1 (/32)
(2) r2 (/32)
(3) r3 (/32)
(4) r4 (/32)
(5) r5 (/32)
(6) r6 (/32)
(7) r7 (/32)
(8) r8 (/32)
(9) r9 (/32)
(10) r10 (/32)
(11) r11 (/32)
(12) r12 (/32)
(13) sp (/32)
(14) lr (/32)
(15) pc (/32)
(16) xPSR (/32)
(17) msp (/32)
(18) psp (/32)
(19) primask (/1)
(20) basepri (/8)
(21) faultmask (/1)
(22) control (/2)
===== Cortex-M DWT registers
(23) dwt_ctrl (/32)
(24) dwt_cyccnt (/32)
(25) dwt_0_comp (/32)
(26) dwt_0_mask (/4)
(27) dwt_0_function (/32)
(28) dwt_1_comp (/32)
(29) dwt_1_mask (/4)
(30) dwt_1_function (/32)
> flash probe 0
device id = 0x10006444
flash size = 16kbytes
flash 'stm32f1x' found at 0x08000000
> halt
target state: halted
target halted due to debug-request, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0xfffffffe msp: 0x20002000
> flash probe 0
device id = 0x10006444
flash size = 16kbytes
flash 'stm32f1x' found at 0x08000000
> flash erase_check 0
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000000a msp: 0x20002000
successfully checked erase state
# 0: 0x00000000 (0x400 1kB) not erased
# 1: 0x00000400 (0x400 1kB) not erased
# 2: 0x00000800 (0x400 1kB) erased
# 3: 0x00000c00 (0x400 1kB) erased
# 4: 0x00001000 (0x400 1kB) erased
# 5: 0x00001400 (0x400 1kB) erased
# 6: 0x00001800 (0x400 1kB) erased
# 7: 0x00001c00 (0x400 1kB) erased
# 8: 0x00002000 (0x400 1kB) erased
# 9: 0x00002400 (0x400 1kB) erased
# 10: 0x00002800 (0x400 1kB) erased
# 11: 0x00002c00 (0x400 1kB) erased
# 12: 0x00003000 (0x400 1kB) erased
# 13: 0x00003400 (0x400 1kB) erased
# 14: 0x00003800 (0x400 1kB) erased
# 15: 0x00003c00 (0x400 1kB) erased
> flash info 0
#0 : stm32f1x at 0x08000000, size 0x00004000, buswidth 0, chipwidth 0
# 0: 0x00000000 (0x400 1kB) not protected
# 1: 0x00000400 (0x400 1kB) not protected
# 2: 0x00000800 (0x400 1kB) not protected
# 3: 0x00000c00 (0x400 1kB) not protected
# 4: 0x00001000 (0x400 1kB) not protected
# 5: 0x00001400 (0x400 1kB) not protected
# 6: 0x00001800 (0x400 1kB) not protected
# 7: 0x00001c00 (0x400 1kB) not protected
# 8: 0x00002000 (0x400 1kB) not protected
# 9: 0x00002400 (0x400 1kB) not protected
# 10: 0x00002800 (0x400 1kB) not protected
# 11: 0x00002c00 (0x400 1kB) not protected
# 12: 0x00003000 (0x400 1kB) not protected
# 13: 0x00003400 (0x400 1kB) not protected
# 14: 0x00003800 (0x400 1kB) not protected
# 15: 0x00003c00 (0x400 1kB) not protected
STM32F03x - Rev: 1.0
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So I got the devboard, as expected, and it happened, nothing worked. The problem really is how I collect, apparently either crooked ld scripts or my hands are crooked or gcc can’t be assembled at all, sad sadness ...
I tried changing everything to fit my stone, googled, and then it came to Stirlitz forum in the process of googling) there is such a feature in ld scripts
__stack = ORIGIN(RAM) + LENGTH(RAM);
_stack = __stack; /* STM specific definition */
so it depends on whether the assembled binary will work or not, this is a pointer to the beginning of the stack and it must definitely be after RAM i.e. ORIGIN (RAM) + LENGTH (RAM)
by default, eclipse creates a project for stone f030 with 8kb of frames, and I have 4!!! that is, the offset is not correct, and naturally, when trying to execute the garbage that it has on the stack, the stone is sent to hardfall.
I corrected the amount of RAM, everything was assembled, linked, the devboard blinked happily with an LED, openocd sprinkled debug messages, in short, life got better.
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
...
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1
...
GPIO_Init(GPIOA, &GPIO_InitStructure);
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