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How to make different targets in one makefile?
I have a makefile that looks like this:
all: ud-button ud-rpl_root
PROJECT_SOURCEFILES += ud-dag_node.c
DEFINES+=PROJECT_CONF_H=\"project-conf.h\"
CONTIKI = ../..
CONTIKI_WITH_IPV6 = 1
include $(CONTIKI)/Makefile.include
all: ud-button
PROJECT_SOURCEFILES += ud-dag_node.c
DEFINES+=PROJECT_CONF_H=\"ud-button.project-conf.h\"
CONTIKI = ../..
CONTIKI_WITH_IPV6 = 1
include $(CONTIKI)/Makefile.include
all: ud-rpl_root
PROJECT_SOURCEFILES +=
DEFINES+=PROJECT_CONF_H=\"ud-rpl_root.project-conf.h\"
CONTIKI = ../..
CONTIKI_WITH_IPV6 = 1
include $(CONTIKI)/Makefile.include
ifndef VARIANT
${info Not VARIANT defines! Set default: normal}
VARIANT = normal
endif
PROJECTDIRS += $(VARIANT)
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Well, do this:
ud-button:
PROJECT_SOURCEFILES += ud-dag_node.c
DEFINES+=PROJECT_CONF_H=\"ud-button.project-conf.h\"
CONTIKI = ../..
CONTIKI_WITH_IPV6 = 1
include $(CONTIKI)/Makefile.include
ud-rpl_root:
PROJECT_SOURCEFILES +=
DEFINES+=PROJECT_CONF_H=\"ud-rpl_root.project-conf.h\"
CONTIKI = ../..
CONTIKI_WITH_IPV6 = 1
include $(CONTIKI)/Makefile.include
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