How exactly does the Adder work in a processor? Signals cannot come at the same time, that is, there will be 2 jobs?

Question

Electronics

And all other logical devices.
Interested in when exactly the calculation takes place.
Let's say 2 signals come, but they won't come at the same time 100%?
That is, let's say there were up to 1 and 1 signals at the inputs, and signals 0 0 come, but first the first 0 will come, and it will go further along the 0 + 1 chain, and then (after 0.0000000001 seconds) the second 0-0 will come and happen calculation 0+0. That is the first extra calculation.

Answer 1

I already answered a question recently about how the adder works, and this question was yours. Apparently, you did not understand my answer, although it seemed to me that it was formulated quite simply. Well, you'll have to chew.
First of all, the adder itself is a combinational digital circuit, and as such, it does not need clock pulses. Two operands were fed to its inputs, and after a delay time, the sum appears at the output. But let's chew it to the smallest bones - let's take an ideal adder, made up of ideal logical elements that do not have signal propagation delays. The initial state is zeros at the inputs. The output, of course, is also zero. We give the first operand. There are no delays, so the exit is right therethe same operand appears (it was added to zero at another input). Then we give the second operand - the sum appears immediately (i.e. again without delay) at the output. I hope everything is clear here (actually, this is my answer to these your 0.0000000001 seconds - yes, at least 0.00000000000000000000000000000001 seconds, in an ideal adder it doesn’t matter).
Now let's consider an adder of real logic elements with a propagation delay. Everything is exactly the same in it, only for the time of the total delay of its components at the output it will be unknown what. So, literally - the first operand was submitted, it is not known what is at the output (some kind of porridge that cannot be trusted), and after a delay time the porridge calms down, and we find this very first operand at the output, which is summed with zero. The second operand was submitted - the same thing: we see the sum at the output when the delay period is over.
It is for this reason that a real adder in a real processor is provided with input and output registers - they allow you to filter out those states that cannot be trusted. We wrote the first operand to the first register by clock pulse 1, then the second by pulse 2 (however, it is possible at the same time), and only then, by clock pulse 3, we write the sum to the output register and let it go further where it was needed. The time between cycles must be knownmore than the total delays in the adder - only under this condition can we be sure of the accuracy of its work. Attempts to reduce the clock time (they say, now I'll make my percent faster) will inevitably lead to failures, i.e. to errors in calculations.
Now it is clear? If still not, ask questions, but not in the form of code - at this level of consideration it is not needed.
And one more thing: you made two identical questions - this is not done here. I strongly advise you to remove the second one, which is now blocked.

Answer 2

It comes exactly at the same time, even if there is some difference due to the speed of light, there is a decent amount of time, for example, between cycles.
The addition operation is divided into a bunch of small ones, such as putting the value of a memory cell into a register, adding, moving the result, all of them are added to the queue and executed as it turns out, the order is determined by a special module, if it decides that it is possible at the same time, then it will do so.

Answer 3

To any more or less complex device inside the processor, a clock frequency is supplied.
And all the elements inside such a device work based on this frequency.
Let there be an adder with 2 inputs. The third input of such an adder will always be clocked. That.
the adder will only do its job when the clock signal changes from, say, 0 to 1
. it doesn't matter when they come (in fact, they don't come, but are set) at the input levels. It is important what they are at the time of arrival of the clock pulse.
those. at time 1 - the level is set at input 1, at time 2 - the level at input 2 is set. , and at the next clock pulse, this result can be processed by other circuits.