Why do hardware FIR filters (FIR filters) do through the FFT?

Question

Electronics

Probably a very stupid question, but I have not found a direct answer. Let's say the task is given to design a hardware pipelined FIR filter (FIR filter) for, say, 1024 points. Why is it usually done through the FFT (Fast Fourier Transform, FFT), and not directly using the convolution formula? After all, it would seem that each next stage of the pipeline does not increase the clock frequency and the area grows linearly. Is not it so?
Maybe somewhere there is information on this topic?

Answer 1

speed?

Answer 2

I may not be completely in the subject, but where is this done? Yes, and hardware FIR is usually not designed, it is already inside the crystal, you just need to configure it. And so there is an assumption that the same block that counts the FFT is used for filters, convolutions, FFT / DCT to save space on the crystal