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imwode2012-09-12 16:47:24
Electronics
imwode, 2012-09-12 16:47:24

Synthesis of a finite and structural automaton

Maybe there are those who know or are currently studying discrete mathematics and will help?

I'm trying to do a fairly simple thing - to synthesize a button click handler automaton. You need to understand:
1. Was the button pressed 2. If
so, was it a short press
3. Or a long one?


Introductory: we have a button. It may or may not be pressed. When a button is pressed, a debounce timer is started and measures the interval of a short button press. If the button is released during the operation of this timer, it returns to its original position. If the timer has expired and the button is still pressed, the long press interval measurement timer starts. If the button is released during the operation of this timer, we fix a short press and go to the initial state. Etc.

I made such a map of transitions and exits .

The subsequent smoking of aids showed that I seemed to have misunderstood the essence of the inputs. Those. there must be one input - x1 (button). The input can be in state 0 or 1.

Further, it is not clear what timers are after all - are they inputs or states? Or is it generally counters that increment according to the second input signal - the cycle? The term “perturbation functions” is also periodically encountered, but nothing is clear with them at all.

And at the next stage, I still need to convert this into a structural automaton and synthesize a logical circuit. Maaamaaaa. Help me please. At least with the correct synthesis of the Mealy machine

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3 answer(s)
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nerudo, 2012-09-12
@imwode

What are the inputs and what are the states in this case is a purely terminological issue. The problem is that the counters do not fit into the framework of the classical description/synthesis of KA. Therefore, in the academic style, they are described separately, i.e. The KA has an output to control this counter and an input that is the value of the counter. Therefore, if you need to synthesize KA "on a piece of paper", then it is better to do just that.
Another thing is if you describe your machine "in practice" in some programming language or hardware description. Here, there is no point in producing unnecessary entities, and the counter with its control signal is integrated directly into the description of the spacecraft.
I would recommend that you redraw your automaton in the form of a graph, not a table - it will become much clearer. Well, for starters, practice on a simpler version - just detecting a click with a debounce.

E
EvilMan, 2012-09-12
@EvilMan

Let the state of the button be read at certain intervals, short enough, but not very. Button state: 0 — the button is not pressed, 1 — the button is pressed.

machine state/button state 0 one
0 0 one
one 0 2
2 0 3
3 0 3

Machine state 1 is a short button press, and machine state 2 is a long button press.

P
parilov, 2012-09-13
@parilov

Verilog solution. FSM Mile. Pressing the button up to 6 cycles is short. More is long.
I checked that pressing more than 10 cycles is immediately considered long.
Didn't - return of SC and outputs to their original state, protection against chatter in the button signal,
less cumbersome calculation of assign short and assign long without comparing the entire count.

FSM Mealy
`timescale 1ns / 1ps
module fsm_mili(
    input clk, input button, input reset,
    output short,//=1 if in fsm recd short (1..5 tick) button press
    output long//=1 if in fsm recd long (6..10 tick) button press
    );

parameter st_start = 2'b00;
parameter st_press_on = 2'b01;
parameter st_finish = 2'b11;

reg [1:0] state = st_start;
reg [3:0] count = 4'h0;

// inc count if posedge clk and button press
// reset count if end cycle
[email protected](posedge clk)
  if (state == st_press_on) count = count + 1;
  else if (state == st_start) count = 4'h0;

[email protected](posedge clk)
  if (reset) begin state <= st_start;
  end
  else
    case (state)
      st_start : begin
// wait button press
        if (button == 1'b1) state <= st_press_on;
        else state <= st_start;
      end
// wait button press_off OR (count clk when button press) = 10
      st_press_on : begin
        if (button == 1'b0 || count == 4'hA) state <= st_finish;
        else state <= st_press_on;
      end
// comment condition for go fsm to start state
// now fsm in one cycle, else fsm must be infinite  
      st_finish : begin
        //state <= st_start;
      end
      default : begin
        state <= st_start;
      end   
    endcase

assign short = (state == st_finish) & (count < 4'h6);
assign long = (state == st_finish) & (count >= 4'h6);
endmodule

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