How to cause a pipeline to fail?

Question

Programming

How to cause a pipeline failure on a modern processor?
There were several ideas, but I'm not sure about them:
1. Stuff a bunch of conditions into the if statement (for example, if(A&0&B&C.....), where A,B,C are some operations). I assumed that all operations would be loaded into the processor, but after the second, the pipeline would be reset. Thus, it will be a simple size of approximately the number of conveyor stages.
2. Using the GCC __builtin_expect extension, direct the processor to the false if-else branch. Assumed that the processor will be loaded with operations that will not be performed. The conveyor will be reset.
Actually, subject.