Can a single core processor execute multiple instructions at the same time?

Question

Processors

Can a single core processor execute multiple commands at the same time, have multiple threads? if so, how can this happen?

Answer 1

1) Can a single core processor execute multiple commands at the same time
No, one core can only execute one command per clock.
2) have multiple threads? if so, how can this happen?
Yes, for example in such technology as hyper-threading. Implemented by the fact that the processor has two sets of registers for two threads, the OS sees a processor with two logical cores.
If one thread is waiting for something, then the processor can switch and execute another thread's instruction.
It is clear that this is not as fast as real two cores - the processor simply will not be idle if one thread is waiting for something, and will not spend time switching from one thread to another, since the data necessary for work is in the second set of registers.

Answer 2

Modern x86 processors are very complex. They have inside them a microprogram for decomposition and transformation of incoming machine words into even lower-level opcodes (micro-opcodes). They include a pipelined architecture, where instructions that are independent of each other are executed partially in parallel. There are specialized SSE, MMX, AVX commands (and Floating-point is also here), their execution is performed on coprocessors and can also be performed simultaneously with the execution of the main commands (and they can also be simultaneously executed on parts of the coprocessor, so it is possible to simultaneously execute two MMX at once commands). Slow memory handling is accelerated by caching, but can still be put "in the background" in favor of faster commands. Transition prediction "guesses"
Now it is difficult to say how many instructions the processor executes per clock. Depending on the program being executed, some Intel or AMD x86 processors are capable of executing up to 32 floating-point instructions per clock and up to 6 "standard" micro-opcodes per clock.
For example, according to the documentation, the digital signal processor of the TMS320 architecture can execute 8 instructions per cycle, and compilers take this into account, set dependency flags, and try to optimize parallel execution.