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Why does the controller not process data marked DATA1(USB)?
On the analyzer, I noticed that when a packet arrives with DATA0, the device responds with ACK, enters the interrupt handler, and everything is buzzing. For example, I took an LED that changes state when a packet arrives at a given endpoint. But when a packet with DATA1 arrives, the device responds with ACK, but does not enter the handler. End point number 2;
void USBCtrHandler(void)
{
uint8_t epindex = heap.istr & USB_ISTR_EP_ID;
uint16_t epr = USB->EPR[epindex];
if(epindex == 0) {
if((heap.istr & USB_ISTR_DIR) == 0) {
if(heap.devAddress != 0) {
USB->DADDR = USB_DADDR_EF | heap.devAddress;
heap.devAddress = 0;
}
if(heap.cntTx != 0) {
USBWriteEP(0);
USBStatusEP(epindex, USB_EP_TX_VALID, TX);
}
USB->EPR[0] &= 0x870f;
} else {
if((epr & USB_EP_SETUP) != 0) {
USBReadEP(0, (uint8_t *)heap.buffSetup, 8);
USBRequest(&SetupPacket, (uint8_t *)heap.buffSetup);
USBSetup();
} else if((epr & USB_EP_CTR_RX) != 0){
}
USB->EPR[0] &= 0x78f;
USBStatusEP(epindex, USB_EP_RX_VALID, RX);
}
} else if(epindex == 1){
if((heap.istr & USB_ISTR_DIR) == 0) {
USB->EPR[epindex] &= ~USB_EP_CTR_TX;
} else {
USB->EPR[epindex] &= ~USB_EP_CTR_RX;
USBReadEP(epindex, (uint8_t *)heap.buffRx, 64);
USBStatusEP(epindex, USB_EP_RX_VALID, RX);
// start = atof((const char*)heap.buffRx);
}
} else if(epindex == 2){
USB->EPR[epindex] &= ~USB_EP_CTR_RX;
USBReadEP(epindex, (uint8_t *)heap.buffRx, 2);
USBStatusEP(epindex, USB_EP_RX_VALID, RX);
cmd = atoi((const char*)heap.buffRx);
GPIOC->ODR ^= GPIO_ODR_ODR13;
}
}
USB_ADDR_TX(0) = 64;
USB_ADDR_RX(0) = 80;
USB_COUNT_RX(0) = 0xbc00;
USB_ADDR_TX(1) = 144;
USB_ADDR_RX(1) = 208;
USB_COUNT_RX(1) = 0xbc00;
USB_ADDR_TX(2) = 272;
USB_ADDR_RX(2) = 336;
USB_COUNT_RX(2) = 0xbc00;
USB->EPR[0] = USB_EP_CONTROL | USB_EP_RX_VALID;
USB->EPR[1] = USB_EP_BULK | USB_EP_RX_VALID | USB_EP_TX_VALID | 0x01;
USB->EPR[2] = USB_EP_INTERRUPT | USB_EP_RX_VALID | 0x02;
USB->CNTR = USB_CNTR_CTRM | USB_CNTR_RESETM | USB_CNTR_SUSPM;
USB->ISTR = 0x00;
USB->BTABLE = 0x00;
USB->DADDR = USB_DADDR_EF;
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