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Who is in charge of allocating memory between RAM and 3 levels of processor cache? Software (programmer) or hardware (hardware)?
Here, let's say, can a program be written (or optimized xs as it should be) to work with cache 1 and 2 levels and not use 3 at all?
Or how does it happen?
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The microcode of the processor controls this.
If you understand how these caches work, then yes, you can try to write a program that will be effectively cached during execution, but it’s not a fact that some data will be guaranteed to be taken from the cache. After all, the task is not one executed on the processor (as a rule).
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