How to use one variable in multiple makefiles?

Question

GNU Make

I have two makefiles, the first one calls the second one.
I would like to get some data from the second makefile.
For a better understanding of the issue, an example:
Makefile

SHAREDVAR =
all:
    cd test && $(MAKE)
    @echo main: $(SHAREDVAR) # Output expected: main: aaa

test/Makefile

SHAREDVAR = aaa
all:
    @echo test: $(SHAREDVAR) # Succeeds: aaa

And I also tried to use this scheme:

Makefile

include Makefile.variable

all:
    cd test && $(MAKE)
    @echo main: $(SHAREDVAR)

Makefile.variable

SHAREDVAR = temp

test/Makefile

.PHONY: all

include ../Makefile.variable

SHAREDVAR = aaa

all:
@echo test: $(SHAREDVAR)

Answer 1

I have two makefiles, the first one calls the second one.
I would like to get some data from the second makefile.

This is not provided for by the logic of make, except that it can be nailed through eval. Usually, when you need a tight connection between different Makefiles, one of them is included in the other (and you get a large logical Makefile divided into several files).