How is the jmp 32bit_address command processed in a 32bit RISC processor if the bus is 32bit?

Question

assembler

How a command + address (of 32 bits) fits into 32 bits
I understand how a command comes, decoded, then looks for operands, how the pipeline works, almost everything is 90% clear.
But I can’t figure out how to switch to a 32-bit address in a 32-bit system, if you need at least 4-12 bits for the command itself (jmp jne ....), respectively, in different formats, there are 20 or less bytes left, like in these 20 bytes to transfer 32 bit. it is directly, as in the working codes jmp 0x00_00_00_ff (jmp label), and not through registers ( jmp ebx is understandable with them).

Phot all x formats.

Machine instruction formats
32-bit machine instruction format (features - low bits are always "11" and bits 2-4 ≠̸ "111"

) 11 10 9 8 7 6 5 4 3 2 1 0
Register/register funct7 rs2 rs1 funct3 rd opcode 1 1
With operand ± imm[10:0] rs1 funct3 rd opcode 1 1
With long operand ± imm[30:12] rd opcode 1 1
Store ± imm[10:5] rs2 rs1 funct3 imm[4:0] opcode 1 1
Branch ± imm[10:5] rs2 rs1 funct3 imm[4:1] [11] opcode 1 1
Jump ± imm[10:1] [11] imm[19:12] rd opcode 1 1

https://ru.wikipedia.org/wiki/RISC-V

Answer 1

Approximately the same way as eight-bit processors process multibyte commands :)
The size of the command is not limited by the machine word.

Answer 2

In an imm command with an operand in the command itself, the jump is most often relative, and in most cases this is enough. Absolute jumps take the value of the address where to jump from some register or data