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How can the RUDY attack be represented in the model using GPSS?
Help with your brains!)
The situation is as follows, it is necessary to simulate an attack like RUDY on a web server, presented as a CMO, using GPSS.
The principle of the attack is to slowly, bit by bit send frames of a complete data packet sent to the server, that is:
1) The server must receive a request
2) Reserve resources for it and wait for the full packet to be received.
The problem arises in the following:
1) GPSS works with a set of homogeneous generated transactions (read requests to QS).
2) Requests come with a certain intensity, well, respectively, with an approximately equal delay of processing devices.
3) The entire described program on GPSS - there is 1 iteration of the globally embedded cycle, that is, all operators are the path of 1 transaction.
For this task, I wrote a simple model that generates requests and server blocks for processing, due to the lack of a solution to the issue, the delay was set to 72 seconds (this includes waiting for all 48 frames and processing them).
QUESTION: is it possible to somehow implement the model, taking into account each individual package of assembling them into a request and further processing?
The intensity of the request is about 200 per second, while the frames of the packet arrive with a delay of 1-2 seconds from each other.
And in order for the server to start waiting for frames, the request transaction must take up RAM and CPU, and then wait for the rest of the packet until it is assembled and processed with the delay inherent in a single request.
RAM STORAGE 1024 ; Объем пула ОЗУ
GENERATE (EXPONENTIAL(1,0,6)) ; Генерация потока заявок 1 заявка приходит в промежутке от 4 до 8мс, что приближено к 200 запросам в секунду
TEST LE Q$BUF,1000,LBL ; Проверка переполнения буфера очереди и перенаправление на сброс пакетов при не выполнении условия
QUEUE BUF ; Постановка запроса в очередь
ENTER RAM,2 ; Занятие ОЗУ(в среднем страничка сегодня весит 2Мб)
DEPART BUF ; Выход запроса из очереди
SEIZE CPU ; Занимаем Процессор
ADVANCE (EXPONENTIAL(1,0,72000)) ; задержка обработки запроса процессором в мс
RELEASE CPU ; Освобождение процессора от запроса
LEAVE RAM ; Освобождение ОЗУ
TERMINATE 0 ; Завершение цикла обработки запроса
LBL SAVEVALUE DENIAL+,1 ; Счетчик запросов, которые не попали в очередь на обработку из-за переполнения буфера
TERMINATE 0 ; Завершение цикла обработки запроса
GENERATE 60000 ; через 60 секунд сгенерируется транзакт, завершение которого остановит программу
TERMINATE 1 ; Завершение программы
START 1 ; Первоначальный счетчик итераций
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