Answer the question
In order to leave comments, you need to log in
Compiling a logic diagram, where to start?
Wrote the editor of function blocks. Blocks only AND, OR, NOT, exclusive OR. I finished this part, I like it, now you need to start emulation. Where to start, where and what to read? Can someone explain in a nutshell?
Thoughts are - by default, the inputs of all blocks are "0", the blocks themselves set the outputs depending on their purpose. following from top to bottom and from left to right, based on the connections set by the user, we change the inputs and, accordingly, the outputs of the blocks until we get to the exit from the circuit. This is where the questions come in. The location of the blocks in the editor is arbitrary and therefore errors are possible. Feedbacks are also possible (while I think to write down the value and substitute it in the next iteration). This is where the thought stops.
Answer the question
In order to leave comments, you need to log in
write the value and substitute in the next iterationGood, good idea.
The location of the blocks in the editor is arbitrary and therefore errors are possibleThe logic of work, of course, should not depend on the location of the blocks on the screen. The blocks call each other recursively to determine the states of their inputs. Each block must remember the states of its inputs and outputs for the current moment in time and, possibly, for the previous moment. Separately, each block has a flag indicating whether the exit state has already been calculated at the current moment. The flag guarantees the end of recursive calls, because if the output has already been calculated, then immediately return from the recursion.
If there were no back-links, then one could simply write the declarations in any order (functional Hasell language):
f1 = x1 && x2
f2 = x1 || x2
f3 = f1 xor f2
f4 = not f3
First you need to build a general formula according to the graph scheme.
Then, decompose into independent groups and build a state table: top - time, left - elements.
So you can understand: what we consider in parallel, and what - sequentially.
Feedback without a clock generator is unrealistic to do.
Here is an example of a simple circuit.
Monitoring the completion of emulation during recursive state transfers from block to block without a clock generator can be done by validating the first output signal at all outputs of the entire circuit. As soon as all the outputs (the outputs of the entire circuit, and not the outputs of individual elements!) Have received a value, we stop the process.
Here are the main elements and laws and identities of the algebra of logic.
You can add the missing elements and see: what is the procedure for calculating and how the simplification of logical formulas is done.
Didn't find what you were looking for?
Ask your questionAsk a Question
731 491 924 answers to any question